1. Field of the Invention
The present invention relates to an analog semiconductor integrated circuit (called an ‘analog LSI’ hereinbelow) and, more particularly, to a bias adjustment circuit for an output section of the analog LSI and a method of adjusting same.
2. Description of the Related Art
FIG. 2 of the accompanying drawings is a circuit diagram of the output section of a conventional analog LSI.
The output section includes a transistor 1, a load resistor 2 that is connected between the drain of the transistor 1 and a supply potential VDD, and a bias resistor 3 that is connected between the drain and the gate of the transistor 1. An analog signal SIG that is internally generated in accordance with an input signal is supplied to the gate of the transistor 1. The source of the transistor is connected to the ground potential GND and the drain of the transistor is connected to an output terminal 4. The output section is a self-bias circuit that holds the potential of the gate at substantially the same potential as the potential of the drain because the gate is connected with the drain via the bias resistor 3.
When the threshold voltage Vt of the transistor 1 is low, a large drain current flows in the output section and the voltage drop caused by the load resistor 2 increases. Accordingly, the voltage across the gate and source drops and the drain current decreases and settles at a desired value. When the threshold voltage Vt of the transistor 1 is high, on the other hand, the voltage drop caused by the load resistor 2 decreases because the drain current is small. Thus, the voltage across the gate and source becomes accordingly larger and the drain current increases and settles at a desired value. Thus, the output section of the self-bias system shown in FIG. 2 is widely adopted as the output section of an analog LSI because the drain current of the transistor 1 can be set at substantially the desired voltage even when there is some variations in the threshold value Vt of the transistor 1 as a result of variations in the fabrication process.
Such an analog LSI is disclosed in Japanese Patent Application Kokai (Laid Open) No. 5-19879, for example.
In the self-bias system of the output section, the voltage across the source and drain of the transistor 1 is lower than the supply voltage to an extent equal to the voltage drop caused by the load resistor 2. As a result, when the supply voltage is low, an adequate voltage across the source and drain is not obtained and a large output signal cannot be generated.